Software Assigned Priority

Software Assigned Priority
A priority assigned by the processor itself to service a source when several interrupts need the interrupt service.

Hardware Assigned Priority

Hardware Assigned Priority
A priority assigned by the processor itself to service a source when several interrupts need the interrupt service. 

Hardware Interrupt

Hardware Interrupt
Interrupt to devices or ports at the system.

Signal

Signal 
An exceotion may also sometimes be called a signal . The processor may also signal an exception.
Example: Division by zero in 80x86

Exception

Exception
Setting of a condition that may be defined by the programmer and programmer defines  the ISR also for handling servicing for that condition. Error conditions are handled by the exceptions. 

Software Interrupt

Software Interrupt
An interrupt by an instruction, by a software timer or by an error condition trap or illegal opcode.

Deadline

Deadline
A period during which service to an interrupt must start.